Power Consumption Measurement in Parallel Systems

In an effort to reduce the energy consumption of high performance computing centers, one approach is to switch hardware to lower power states in promising parallel application phases. But statically switching the power saving mechanisms increases the application runtime. As a consequence, no energy can be saved. Contrary to static switching strategies, dynamic switching strategies consider the hardware usage in the application phases to switch between the different modes without increasing the application runtime. This book designs and evaluates tool extensions for power consumption measurement in parallel systems with the final goal to characterize and identify energy-efficiency hot spots in scientific applications. Using an energy-efficiency benchmark for parallel systems, typical hardware usage pattern are identified to characterize the workload, the impact on the node power consumption and finally the potential for energy saving. The significant power and energy-saving potential led to the design of a software interface for the efficient management of the power saving modes per compute node to be exploited by application programmers.